Tír Na HiFi

abraxalito wrote: ↑Tue Aug 08, 2017 12:11 pm I made the frequency response measurement today - shocked to find I had inadvertently engineered in a dip of about 5dB around 10kHz due to not using the right model for the J327 MOSFET. Wipes egg off face gingerly. Back to the drawing board to explore ways to get the FR flat...

Ok, so it might not require new MOSFET, just a new model & some circuit changes

It turned out to be surprisingly easy to import Toshiba's PSPICE model for the J327 into LTSpice and it ran without any errors. However the model's a long way from reality, not least in the threshold voltage which is about half what I'm seeing in the real circuit. So the way forward looks to be carrying on increasing the bias to flatten the HF FR. I've gotten the 5dB dip down to 2dB now and the SQ has improved.

abraxalito wrote: ↑Wed Aug 09, 2017 1:22 am It turned out to be surprisingly easy to import Toshiba's PSPICE model for the J327 into LTSpice and it ran without any errors. However the model's a long way from reality, not least in the threshold voltage which is about half what I'm seeing in the real circuit. So the way forward looks to be carrying on increasing the bias to flatten the HF FR. I've gotten the 5dB dip down to 2dB now and the SQ has improved.

Jaysus, manufacturers should be shot - how can datasheet specs be trusted if spice models are so far off reality?

You might be interested to read some of Kendall Castor-Perry's journeyings into the world of sims and sim models - http://www.edn.com/design/analog/441193 ... n-interact

with the gain stage is it correct that it clips over 200mv input v?
simulation suggests similar?

No, should be able to go to 2V total swing -> 20V swing on output (24V supply).

Seemsvto be only on the positve wave
I placed the gate on 5he center of a voltage divider to get the 3.2 v for the bias
125k and 820k
Raising the bias seems to ease the issue
Maybe I need to put another 820k between voltage divider midpoint and input gate?

The bias voltage for the gate needs to be around the centre of the supply (so 12V for 24V) or yes you'll get clipping in one direction way too soon. If you really need a bias voltage at 3.2V then you'll need to add a current source to provide an offset to the feedback node so the output sits around 12V.

abraxalito wrote: ↑Sat Aug 12, 2017 2:28 am The bias voltage for the gate needs to be around the centre of the supply (so 12V for 24V) or yes you'll get clipping in one direction way too soon. If you really need a bias voltage at 3.2V then you'll need to add a current source to provide an offset to the feedback node so the output sits around 12V.

ok
i put the gate to mid ps voltage
seems to work although i assumed this would be fit to drive headphones directly?
with 32ohm headphones its a no go, have i still something wrong?

could a bipolar supply be used say +/- 12v and ac couple the input and use a dc coupled output been able to adjust the dc offset set by varying input gate voltage?

No, this gain stage was designed to be just that - a stage for providing gain in front of a unity gain buffer (either for high impedance headphones like DT880s or for speakers). It could be up-biassed though to drive 32ohms - it would need the output CCS winding up to be higher than the maximum output current demanded.

Changing to a balanced supply would negate the constant current draw design philosophy. It will still work but I reckon dynamics will suffer.