Soekris Dam Dac

[Bmxmen]

<a href=https://zapodaj.net/b72005712240c.jpg.h ... 216.jpg</a>

[wushuliu]

Somewhat random post, but it suddenly occurred to me: has Soekris ever actually *thanked* anyone for helping to improve his dac? After all the effort people put in to convince him the first version needed improving, I don't think I've ever seen him express any thanks/gratitude/anything.

[wushuliu]

My previous grumpy post aside, the 1121 is now almost too cheap to pass up. Just a few dollars more than the 1021. I will probably get one since it seems like it may outperform the 1021 plus more power supply flexibility and less modding/removing components required.

[bogdandascalu87]

Nige, have you made any progress in changeing the si5xx clock with fixed frequency ones? As far as i know those clocks must be 45 and 49. Also, at startup, si5xx is working at 10mhz, but do not know if the fpga is useing that frequency in the startup process. Your dam is useing only one xo at a time?

These days i’ ll try to sniff the i2c prtocol between the stock clock and the fpga to see what the fpga really asks from the clock. The si5xx can make small adjustments without stopping frequency generation. I hope the fpga won’t relly on this feature. Also, my dam is 1121. I intend to use it in slave mode with stereo output. In this case i lose the fifo, but the selection of clocks could be made externally, between 45 and 49 or 10/45/49, and i should not need the small frequency adjust feature to keep the dac in lock state.

[bogdandascalu87]

Setting the dam1121 in slave mode, will expect i2s from master board and mclk from external clock. My intention is to run one board in slave mode with only one domain clock. Today i scoped i2s out to see what will expect a slave board as input. Bclk is 64fs but, here are the pics:

https://ibb.co/fNGvpDG
https://ibb.co/gWTSj0P

Any suggestions?

[bogdandascalu87]

Ok, really got to wipe the dust next we, but, good news.

I finally run dam1121 with fixed clock, no clicks, no loosing lock state.

A mess, but works. Definitely recommend to do the mod. Ads a lot of details, voices are cleaner, instruments are better separated, bass is much more deeper and well defined, more dynamics.

https://ibb.co/9sxxfVN
https://ibb.co/qJ7Jm5c
https://ibb.co/H25vjtP

However, it works, but i think something is not good. With the original clock, i sniffed the i2c us between fpga and clock and i had a lot of readings, 3-4 on second. In stock configuration, the fpga, actually controls the programable clock and it is doing it frequently. I assume is something relative to the fifo states, full or empty, and the difference between clock domains. Nigel2000 said after he did this mod on his 1021, that after 5-6mins the board looses i2s sync. Maybe because in his tests, source and dac had their own clock sources. If i will have time, i will try to experiment with a raspberry and fixed clock for the dam, so different domain clocks.

Best regards and i wait your comments

[nige2000]

I was suspecting I damaged something on the 1021 I was trying to work with lvds. Your successful attempt is great work well done.

[bogdandascalu87]

Also, check out u2 on the 1121, between u8 and u11 f-f, it’s a lvds to ttl converter like DS90LV012A, where pin 5 is terminated then distributed to f-f and fpga. I think i will replace it with a u.fl plug and feed mclk, right there.

3 moons ago, i made some x-rays to my dac. Those helped me a lot finding the clock distribution. Pin5 of u2 seems to be the best place for ttl mclk.

Morever, somebody on diyaudio uploaded a picture of dam1021 traces, clk+ and clk- are going straight to the fpga. This is why soren stated that he changed clock distribution in the latter launched 1121 version.

It would be verry interesting to see how is clock distributed in 1921/1941 because soren said that in usb input, fpga and xmos are driven syncronouslly, and maybe at a fixed frequency.

https://ibb.co/YQw7Gvr
https://ibb.co/fvrBNBR
https://ibb.co/ZG5V9nJ
https://ibb.co/T8mBpL3

[wushuliu]

Hi guys, got an SOS here. I was in the process of removing the isolators based on Randy's photos when I accidentally pulled up two of the pads. Then I realized I don't actually know where the heck the pinouts are supposed to go!!! Anyone know where I else I connect to? Pic attached.

Isolators.jpg (172.87 KiB) Viewed 5541 times

[wushuliu]

Never, mind found a way to connect to the Xilinx. If what I hear so far holds up then doing a flip flop followed bypassing/removing the isolators is the best mod I've done so far.